Rise Design Automation Debuts AI-Enhanced EDA at DAC 2025: A New Chapter in Chip Design

By Sanjay Gangal · Published 2025-07-08 · Original on LinkedIn

By Sanjay Gangal | SanjayTechCafe July 8, 2025

When the semiconductor industry convened in San Francisco for the 62nd Design Automation Conference (DAC) in late June, most companies arrived with slides, specs, and sales decks.

But one newcomer— Rise Design Automation—showed up with something more ambitious: a fundamentally different vision for how AI and high-level synthesis can reshape chip design.

This year marked Rise’s first public appearance since coming out of stealth in late 2024, and the buzz around their booth at DAC (booth #2121) reflected the curiosity—and cautious optimism—within the EDA community.

Their offering? A platform that unites modern high-level synthesis (HLS), full SystemVerilog support, and generative AI—all built to close the productivity gap in modern SoC design.

In a video interview now published on SanjayTechCafe, I sat down with Ellie Burns-Brookens, Head of Marketing at Rise, to unpack their technology, early customer results, and what this means for the future of design automation.

> “We’re raising the abstraction and embedding intelligence, but always with the engineer in the loop,” Ellie said.

From Concept to Concrete: Rise’s Real Deliverables

While abstraction in hardware design isn’t new, Rise DA’s approach is unusual in that it fully supports SystemVerilog—not just C++ or SystemC—at the input level. This allows teams to use familiar HDL constructs while accessing the productivity of HLS.

Even more significant is their integration of generative AI into the synthesis workflow. Rise’s tools don’t rely on proprietary models trained on RTL (a privacy minefield).

Instead, they use existing language models (e.g., ChatGPT, smaller open-source models) combined with a retrieval-augmented generation (RAG) layer trained on internal tool knowledge and synthesis strategies.

> “It’s not about replacing engineers,” Ellie emphasized. “It’s about accelerating them—with context-aware help that actually understands the job.”

The result? AI that helps synthesize interfaces, fix constraints, or scaffold new logic—not from RTL, but from higher-level inputs where LLMs can safely and effectively operate.

What Customers Are Seeing

Rise is already shipping its platform in limited engagements and has been working with several top-tier semiconductor companies in Silicon Valley and Europe.

Most of these early adopters were already HLS users, but are now testing whether Rise’s tools can handle more complex design styles—especially control logic and verification closure.

According to Ellie, the feedback has been strong:

- Synthesis speedups of 10x

- Comparable or better QoR than hand-coded RTL

- Greater design coverage across heterogeneous blocks

- Integration pathways with industry-standard synthesis and P&R flows

Perhaps most notable is that companies are now experimenting with design types they had previously ruled out for high-level methods.

> “We’re seeing not just better results—but a shift in mindset,” she said.

Verification, Deployment, and Realism

Rise isn’t just focusing on synthesis. The company recently added a coverage closure solution, allowing teams to verify high-level designs and trace results cleanly into RTL for signoff.

The system also integrates with external timing tools, even enabling flow-aware optimizations like re-synthesizing critical paths based on post-P&R feedback.

> “RTL is still the golden reference,” Ellie confirmed. “But now we can reach it more easily, more cleanly—and with much less manual effort.”

Deployment options include cloud-based or local installations, with relatively modest GPU requirements. Because Rise doesn’t rely on retraining custom models on proprietary RTL, the rollout process is simpler and more secure.

What’s Next for Rise?

Looking ahead, Rise DA’s roadmap includes deepening support across SystemVerilog, SystemC, and C++, expanding verification capabilities, and scaling customer engagements beyond the current early adopter phase.

> “We're growing thoughtfully,” Ellie said. “Every engagement right now is personal—deeply supported by our AEs—and that’s how we want it to stay as we scale.”

A Human Touch

The conversation ended on a personal note. Ellie, when not shaping the future of EDA, is a passionate travel photographer.

She recently returned from five weeks in the Outer Hebrides and Shetland Islands, photographing wildlife and landscapes. Her work is available at TravelWithElliePhotography.com.

The beautiful stack and cliffs at Yesnaby, Orkney Islands

She also confessed a love for a cappella singing—a side of her she hasn’t shared much with her team at Rise. “Maybe one day we’ll form a company quartet,” she joked.

Watch the Full Interview

The full conversation is available on SanjayTechCafe’s YouTube Channel, where we go deeper into Rise DA’s AI strategy, demo plans, customer stories, and future roadmap.

Ellie Burns-Brookens 1y

Thanks Sanjay for the insightful article and spending time with Rise!

Back to all articles