How Aniah Is Using AI to Transform Analog Chip Verification
By Sanjay Gangal - https://www.youtube.com/@SanjayTechCafe
In the rarefied world of semiconductor design, transistor-level verification has long been one of the most painstaking—and expensive—parts of the chip development process.
Even as EDA tools have advanced for digital design, analog and mixed-signal verification remains a stubborn bottleneck.
Enter Aniah, a Grenoble-based startup that’s aiming to change that narrative with cutting-edge applications of AI and formal verification techniques.
I recently sat down for a conversation with Vincent Bligny, Aniah’s CEO, to explore how their technology is poised to reshape this corner of the semiconductor industry.
The interview—now available on YouTube—covers topics ranging from Aniah’s novel approach to Electrical Rule Checking (ERC) to the company’s soon-to-be-launched product, Amigo, which will debut at DAC 2025 later this month in San Francisco.
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Watch the interview: How Aniah is Revolutionizing ERC Verification with AI & Amigo | Interview with Vincent BlignyA Smarter Way to Verify
Traditionally, analog verification is a manual, labor-intensive process, relying heavily on skilled engineers to comb through potential design violations.
The complexity only increases with today’s advanced process nodes and the proliferation of mixed-signal system-on-chips (SoCs).
Vincent argues that Aniah’s ERC tool fundamentally changes this landscape. Instead of simply flagging violations, it provides a much deeper understanding of the root causes—allowing engineers to fix issues faster and with more confidence.
“ERC is often seen as a checklist, but we wanted to build something more intelligent,” Vincent explains. “Our tool doesn’t just find violations, it explains them in context.”
What Is Amigo?
Aniah’s next chapter is Amigo, a new product designed to further simplify verification workflows.
Though details remain under wraps until DAC 2025, Vincent teases that Amigo will bring unprecedented usability and AI-assisted features to formal verification at the transistor level.
“It’s about making these advanced tools accessible to a broader range of engineers,” he notes. “With Amigo, we want to democratize high-level verification—making it not only faster but easier for teams to adopt.”
AI in EDA: Hype or Reality?
Given the recent surge of AI in all areas of tech, I asked Vincent whether AI in transistor-level verification is truly ready for prime time.
“We’re pragmatic about AI,” he says. “It’s not about replacing human expertise but augmenting it. For repetitive, pattern-based tasks, AI is very effective.
But for deep understanding of circuit behavior, you still need strong formal methods and engineering insight.”
It’s a balanced perspective—and one that resonates with many verification experts grappling with the limits of AI-driven design tools.
Looking Ahead
As the industry pushes toward increasingly complex analog and mixed-signal designs—driven by automotive, 5G, and AI applications—verification will only grow in importance.
Vincent believes that tools like Aniah’s ERC and Amigo can help bridge the gap: “We see this as a generational opportunity to modernize how analog verification is done.
Our goal is to help engineers focus on what they do best—innovating—while we handle the grunt work.”
Whether you’re a chip designer, an EDA engineer, or simply a technology enthusiast, Aniah’s story is one to watch. And if you’ll be at DAC 2025 in San Francisco, make sure to stop by Booth #1427 to see Amigo in action.
For the full interview with Vincent Bligny, visit my YouTube channel. If you enjoy the content, please consider subscribing for more conversations with industry leaders.